Lecture 9 RISC-V Decision Making and Logical Operations

Branches

# if reg1 == reg2, jump to label
beq reg1, reg2, label

# if reg1 != reg2, jump to label
bne reg1, reg2, label

# if reg1 < reg2, jump to label
blt reg1, reg2, label

# if reg1 >= reg2, jump to label
bge reg1, reg2, label

# if reg1 < reg2 (unsigned), jump to label
bltu reg1, reg2, label

# if reg1 >= reg2 (unsigned), jump to label
bgeu reg1, reg2, label

Loop

for (...) {
    ...
}

while(...) {
    ...
}

do {
    ...
}
while(...);

Logical Instructions

and

and / andi

# Register

and x5, x6, x7 # x5 = x6 & x7

# Immediate

andi x5, x6, 3 # x5 = x6 & 3

Not (X)

There is no logical NOT in RISC-V

Use xor with \(11111111_{two}\)

Logical Shifting

Left Shifting (0 complement)

sll / slli

Shift Left Logical (sll) and immediate (slli):

slli x11, x12, 2 # x11 = x12 << 2

Store in x11 the value from x12 shifted by 2 bits to the left (they fall off end), inserting 0’s on right; << in C.

Right Shifting

Complete with 0

srl / srli

Shift Right Logical (srl) and immediate (srli):

Complete with signal bit

sra / srai

Shift Right Logical (sra) and immediate (srai):

Program Execution

Symbolic register names

• a0 - a7 for argument registers (x10 - x17) for function calls
• zero for x0

Pseudo - instructions

Shorthand syntax for common assembly idioms

mv rd, rs  =  addi rd, rs, 0
li rd, 13  =  addi rd, zero, 13
nop  =  addi zero, zero, 0